Pulse responsive control network

ABSTRACT

A pulse responsive control network including a first and second plurality of control devices sequentially operated by electrical signal pulses of one sense for effecting control functions, together with first and second means operable respectively in response to initial sequential operation of a last of said first and second plurality of control devices for providing clearing pulses of another sense to condition other of the respective first and second plurality of control devices for sequential reoperation to effect a multiplexing action, together with switching means effective upon completion of the reoperation of the other of said first plurality of control devices to condition the second plurality of control devices for sequential operation by the electrical signal pulses of said one sense; and other means to effect electrical signal pulses of said other sense to selectively terminate the operation of the first and second plurality of control devices, said last mentioned means including a time delay means to cause the signal pulses of said other sense to terminate the operation of said second plurality of control devices after termination of the operation of the first plurality of control devices has been effected.

ilied States Patent [72] Inventors R rt J- M ln Primary ExaminerRalph D. Blakeslee New York, N.Y.; Attorneys-Herbert L. Davis and Flame, l-lartz, Smith and Walter Parfomak, Wallington, NJ. Thompson [21] Appl. No. 758,946 [22] Filed Sept. 11,1968

'f of 1966 ABSTRACT: A pulse responsive control network including a 3440637 first and second plurality of control devices sequentially [45 Pav.3nted May 19.71 operated by electrical signal pulses of one sense for effecting [73] Asslgnee The Bend Corporamn control functions, together with first and second means operable respectively in response to initial sequential operation of a last of said first and second plurality of control devices for providing clearing pulses of another sense to condition other of the respective first and second plurality of control devices [54] PULSE RESPONSWE CONTROL NETWORK for sequential reoperation to effect a multiplexing action, 31 Claims, 11 Drawing Figs. together with switching means effective upon completion of the reoperation of the other of said first plurality of control [52] US. Cl 340/167, devices to condition the second plurality of control devices f 325/39 sequential operation by the electrical signal pulses of said one [51] Int. Cl H04q 3/00 Sense; and other means to effect electrical Sigma pulses of i [50] new of Search" 340/167; other sense to selectively terminate the operation of the first 325/39; 179/15 (SQ), 15 (Async) and second plurality of control devices, said last mentioned means includin a time dela means to cause the signal ulses [56] References C'ted of said other se nse to termi ate the operation of said s cond UNITED STATES PATENTS plurality of control devices after termination of the operation 3,394,223 7/ 1 968 Dewitt l Y of the first plurality of control devices has been effected.

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AM N u aw a5 @3 3 Q3 PATENTED MAY 4 I971 SHEET (17 [1F 10 INVENTORS ROBERT J. MOLNAR WALTER PARFOMAK UR \Nh PATENTED MAY 4 I971 SHEET 08 HF 10 Q VKUQNQ mvlirons ROBERT J. MOLNAR WAL TR PARFOMAK nrramval CROSS-REFERENCE TO RELATED APPLICATIONS AND PATENTS The present application is a division of a copending U.S. application Ser. No. 535,745, filed Mar. 21, 1966, by Robert J. Molnar and Walter Parfomak' and now U.S. Pat. No. 3,440,637, granted Apr. 22, 1969 for a Solid-State Display with Electronic Drive Circuitry. The present invention is directed to a pulse responsive control network as described and claimed herein with reference to the control network of FIGS. 6 and 7. The dimming control network described herein with reference to FIG. 4 is the subject matter of a U.S. application Ser. No. 758,378 filed Sept. 9, 1968 by Robert J. Molnar and Walter Parfomak as another division of the U.S. application Ser. No. 535,745, filed Mar. 21, 1966, and now U.S. Pat. No. 3,440,637, granted Apr. 22, 1969. The last mentioned U.S. application Ser. No. 535,745 was in turn filed as a con tinuation-in-part as to all common subject matter of a now abandoned U.S. application Ser. No. 467,391, filed June 28, 1965, by Robert J. Molnar and Walter Parfomak for a Solid- State Display with Electronic Drive Circuitry.

The solid-state display system to which the pulse responsive control network of the present invention may be applied may include a condition sensor, comparator, drive circuitry, driven step integrator network and feedback summation network for driving a plurality of electroluminescent display segments. In such a display system the condition sensor may, for example, include: (1) a thermocouple of a type arranged to provide an analog direct current signal corresponding to a sensed temperature condition; or (2the condition sensor may be of a fuel flow synchro sensing type which may necessitate the use of a converter such as described and claimed in a U.S. Pat. No. 3,375,508, granted Mar. 26, 1968, on U.S. application Ser. No. 422,766, filed Dec. 31, 1964 by Robert J. Molnar and Walter Parfomak, the inventors of the present invention.

Further, the comparator provided in the system may be of a type described and claimed in a U.S. Pat. No. 3,363,112, granted Jan, 9, 1968, on a U.S. application Ser. No. 386,996, filed Aug. 3, 1964 by Robert J. Molnar and Walter Parfomak, the inventors of the present invention.

Moreover, the electronic drive circuitry utilized in the system may be of a type described and claimed in a U.S. Pat. No. 3,333,114, granted July 25, 1967, on a U.S. application Ser. No. 400,534, filed Sept. 30, 1964 by Robert J. Molnar and Walter Parfomak, the inventors of the present invention.

Furthermore, there may be provided in the drive circuitry a control circuit and electronic step integrator of a type described and claimed in a U.S. Pat. No. 3,427,609, granted Feb. 11, 1969, on a copending U.S. application Ser. No.

- 41 1,803, filed Nov. 17, 1964 by Robert J. Molnar and Walter Parfomak, the inventors of the present invention. All of the foregoing applications and patents have been assigned to The Bendix Corporation, the assignee of the present invention.

As distinguished from the foregoing features, the present invention is directed to an improved pulse responsive control network as more specifically described and claimed herein with reference to FIGS. 6 and 7.

BACKGROUND OF THE INVENTION 1. Field of the Invention The invention is in the field of solid-state display with electronic drive circuitry and, more particularly, to an improved control network including improved electrical pulse responsive control means.

2. Description of the Prior Art I-Ieretofore, solid-state display systems have been provided including means for controlling the illumination of a stack of electroluminescent segments which may be of a type similar to that of the electroluminescent segments disclosed in a U.S. Reissue Pat. No. 26,207, granted May 23, 1967 to Frederick Blancke Sylvander and assigned to The Bendix Corporation, assignee of the present invention.

In the display system of the U.S. Reissue Pat. No. 26,207,

and in the arrangement of the present invention, the electroluminescent segments are of a type having thin films of phosphor material sandwiched or positioned immediately between two electrical conductive layers one or both of which may be transparent. In such an arrangement, each electroluminescent layer is essentially a capacitor which is so arranged that upon the application of an alternating current voltage across the outer conductive layers, the phosphor material will emit light, as heretofore explained in the aforenoted U.S. Reissue Pat. No. 26,207, while upon a direct current voltage being applied thereto, the capacitor effect of the electroluminescent segment serves to block the passage of the direct current therethrough so that no light is emitted from such electroluminescent segment.

In the present invention, the specific control network for the stack of electroluminescent display segments is quite different from that disclosed in the U.S. Reissue Pat. No. 26,207. Thus in addition to the provision of a means responsive to an output signal proportional to a sensed condition'to selectively operate a control network so as to connect a source of alternating current to said display segments for effectively illuminating said segments to provide a variable length luminous display column indicative of the sensed condition, there is further provided in this invention an improved electrical pulse responsive control network for effecting the selective control functions in four modes of operation corresponding to (l) a large increasing signal condition, (2) a small increasing signal condition, (3) a small decreasing signal condition, and (4) a large decreasing signal condition.

Such modes of operation result from the provision of a plurality of first control devices sequentially operated in response to small increasing and decreasing signal conditions and a plurality of second control devices sequentially operated in response to large increasing and decreasing signal conditions; together with control means selectively operated in response to an operative condition of the last control device of each of the first and second plurality of control devices for providing a multiplexing action of the other control devices of said first and second plurality of control devices.

There is no suggestion in the prior art of the foregoing idea of means and the mode operation thereof as provided in the present invention.

SUMMARY OF THE INVENTION The invention contemplates an improved electrical pulse responsive control network applicable in response to a sensed condition control to effect illumination of a stack of electroluminescent segments in four modes-of operation corresponding to (l) a large increasing signal condition, (2) a small increasing signal condition, (3) a small decreasing signal condition, and (4) a large decreasing signal condition.

An object of the present invention is to provide an improved pulse responsive control network to effect the foregoing including a first plurality of control devices or rectifiers sequentially operated by electrical signal pulses of one sense for effecting the desired control functions, together with a current control means or Zener diode operative in response to an initial sequential operation of a last of said first control devices for causing the operation of a capacitor in such a manner as to effect an electrical clearing pulse of another sense to terminate the operation of the other of said first control devices or rectifiers.

Another object of the invention is to provide a circuit holding means rendered effective by the initial operation of the last of said first control devices or rectifiers for maintaining the control functions effected by the initial sequential operation of said other first control devices so that the first control devices may be reoperated to provide a desirable multiplexing action.

Another object of the invention is to provide in the aforenoted arrangement a capacitor-resistance network rendered effective. by the initial operation of the last of said first control devices to provide a time delay action to prevent the aforesaid electrical clearing pulse of said other sense from terminating the initial operation of the last of said first control devices.

Another object of the invention is to provide in the aforenoted arrangement an improved switching means conditioned by the initial operation of the last of said first control devices for subsequent operation upon completion of a sequential reoperation of the other of said first control devices to render effective a second plurality of control devices, the second plurality of control devices being thereupon sequentially operable by electrical signal pulses of said one sense for effecting other control functions.

Another object of the invention is to provide in the aforenoted arrangement another current control means or Zener diode operative in response to an initial sequential operation of a last of said second control devices for causing the operation of another capacitor in such a manner as to effect an electrical clearing pulse of said other sense to terminate the operation of the other of said second control devices.

Another object of the invention is to provide other circuit holding means rendered effective by the initial operation of the last of said second control devices for maintaining the control functions effected by the initial'sequential operation of the other of said second control devices so as to permit reoperation of the other of said second control devices to pro vide a desirable multiplexing function.

Another object of the invention is to provide in the aforenoted arrangement switching means controlled by the operation of the first of said sequentially operable second control devices for rendering the last mentioned electrical clearing pulse ineffective to terminate the operation of the last of the second control devices.

Another object of the invention is to provide in the aforenoted arrangement means whereby the operation of the last of said second control devices may be terrninable by subsequent clearing pulses being applied following termination of the operation of the first of said sequentially operable second control devices.

Another object of the invention is to provide means responsive to electrical signal pulses of another sense to effect electrical clearing pulses to selectively terminate the operation of the first and second plurality of control devices, and said last mentioned means including a time delay means to cause the clearing pulses to terminate the operation of said second plurality of control devices after the operation of the first plurality of control devices has been tenninated by the clearing pulses provided by said means in response to the electrical signals of said other sense.

These and other objects and advantages of the invention are pointed out in the following description in terms of the embodiment thereof which is shown in the accompanying drawings.

IN DRAWINGS FIG. ll shows a block diagram of an electroluminescent photoconductor solid-state display system embodying the invention.

FIG. 2 is a symbolic representation of the electroluminescent photoconductor matrix in a novel layout arrangement for indicating coarse, fine, and sectional controls in driving the electroluminescent display segments.

FIG. 3 shows an enlarged detailed fragmentary schematic view of the electroluminescent photoconductor matrix shown in FIG. 2, as attached to the electroluminescent display segments for illuminating the same.

- FIG. 4 is a detailed circuitry of the dimming circuit shown in FIG. 1. FIG. 5 is an electronic circuit diagram of the comparator and drive circuitry for operating the driven network of the electroluminescent photoconductor solid-state display system shown in FIG. 1.

FIG. 6 shows the fine driven and feedback summation networks of the electronic circuit shown in FIG. 5.

FIG. 7 shows the coarse driven and feedback summation networks and a continuation of the networks shown in FIG. 6.

FIG. 8 shows the fine and coarse electroluminescent capacitor control section of the system.

FIG. 9 shows the photoconductor control section of the system.

FIG. 10 shows an enlarged detailed fragmentary schematic view of the photoconductor section of FlG. 9; overlaying the fine and coarse electroluminescent capacitor control section of FIG. b; and,

FIG. 11 is a layout of another embodiment of the solid-state display system showing a fine and coarse electroluminescent control section like FIG. 8 interconnected with a photoconductor control section like FIG. 9 to produce an electroluminescent photoconductor matrix which is operated by a silicon controlled rectifier switching arrangement like the arrangement shown in FIG. 5 to 7 for lighting the electroluminescent display segments.

DESCRIPTION OF THE INVENTION The electroluminescent photoconductor solid-state display system comprises an indicator panel and a driven network utilizing a novel optoelectronic approach. A condition sensor device is provided to obtain from analog signals such as exhaust gas temperature, fuel flow or a tachometer, a direct current analog signal to control a comparator circuit and in turn an electronic drive circuitry to efi'ect a corresponding control of a driven network including electroluminescent segments arranged in an instrument simulating a thermometer-type moving display.

More specifically the condition sensor means used may, for example, be: l a thermocouple of a type arranged to provide an analog direct current signal corresponding to a sensed temperature condition; or (2) the condition sensor means may be of a fuel flow synchro signal sensing type which may necessitate the use of a converter such as described in the aforementioned U.S. Pat. No. 3,375,508, granted Mar. 26, 1968 to Robert J. Molnar et al., assigned to The Bendix Corporation, the same assignee as the present invention; or (3) the condition sensor means may be tachometer signal sensing means of a type in which tachometer signals are converted to produce one pulse per cycle of a generator speed and in which the amplitude and width of the pulses are controlled so that a filtered output produces a direct current analog signal which is an accurate function of the sensed condition or tachometer speed.

Referring to the drawing of FIG. 1, there is indicated a block diagram of the system. A condition sensor 210 provides a direct current analog signal corresponding to the sensed condition which is directed, as shown by arrow 211, to an electronic error detector, such as, a comparator 216, which may be analogous to a differential in an electromechanical system. The comparator 216 may be of the type described and claimed in the aforenoted U.S. Pat. No. 3,363,112, granted Jan. 9, 1968 to Robert .I. Molnar and Walter Parfomak for a single transistori'zed comparator circuit and assigned to The Bendix Corporation, the assignee of the present invention.

An electronic drive circuitry 218 which may be of a type described and claimed in the aforenoted US. Pat. No. 3,333,114, granted July 25, 1967 to Robert J. Molnar and Walter Parfomak for an electronic drive circuit and assigned to The Bendix Corporation, may include as shown by FIG. 5, a control circuit 219 which receives the differential output signal, as shown by arrow 215, from the comparator 216. The control circuit 219 in turn controls the operation of the drive circuit 218 in applying driving pulses, as shown by arrow 217 of FIG. 1, to a driven network 221.

The driven network 221, shown in FIGS. 6 and 7, under control of the driving pulses applies electrical pulses, as indicated by the arrow 223 of FIG. 1, to regulate .the operation of the electroluminescent matrix 220, as shown by FIG. 8. Further, a summationnetwork'222 receives electrical signal information, as shown by arrow 225, from the driven network 221 and directs a feedback signal, as indicated by the arrow 227, to the comparator 210 corresponding to the regulated condition of the matrix 220.

More specifically the driven network 221 directs signal information corresponding to the regulated operation of the electroluminescent capacitor strips extending, as shown by FIG. 8, along the X-axis and Y-axis of the matrix 220, while the summation network 222 then integrates the information signal until the direct current feedback signal voltage directed to the comparator 216 from the summation network 222, as shown by an arrow 227 of FIG. 1, is equal to the direct current analog signal voltage directed to the comparator 216 from the condition sensor 210, as shown by the arrow 221. That is, the DC feedback signal voltage acts in oppos'm'on to the DC analog signal voltage so that when the resulting differential or error signal voltage is reduced to zero, the integration is accomplished.

ELECTROLUMINESCENT MATRIX It should be also noted at this time that multisegment switching of the electroluminescent display portion of the invention requires three orders of control including a fine control, a coarse control, and a third order of control achieved by photoconductor switches 224 being arranged to receive light from the electroluminescent capacitor strips F1 to F of the electroluminescent matrix 220, as shown by arrows 229 of FIG. 1.

A last row of Y-axis extending photocells are provided to control the excitation of each succeeding row of X-axis extending photocells in which the first row of X-axis extending photocells does not require such control since it is excited continuously.

The electroluminescent matrix 220 of FIG. I is shown symbolically in FIG. 2, partially in schematic form in FIG. 3 and in detail in FIGS. 8, 10, and 11.

In addition, the photoconductor switches 224, shown in the block diagram of FIG. 1, are also shown symbolically in FIG. 2, partially in FIGS. 3 and 4, and in detail in FIGS. 9, 10, and 1 1. An electroluminescent display column made up of a series of electroluminescent display segments 226, shown in FIG. I, is connected to be energized by theelectroluminescent matrix 220 and the photoconductor switches 224, as shown by arrows 229 and 230, respectively. The electroluminescent display segments 226 are shown symbolically in FIG. 2 and partially schematically in FIGS. 3, d, 9, 10, and 11. The electroluminescent display segments 226 are described more fully in the aforementioned U.S. Reissue Pat. No. 26,207.

A dimming circuit 228, providing means for dimming the electroluminescent display 226 by manual control, is shown in FIG. 1 connected to the system by a line 231. The dimming circuit 223 is more specifically shown in FIG. 4, as including a back biased diode bridge in series with the ground leg of the electroluminescent display section, as hereinafter more fully described.

As shown symbolically in FIG. 2 and in detail in FIGS. 8, 9, 10, and 11, the electroluminescent matrix 220 is optically coupled to the photoconductor switches 224 to form an electroluminescent photoconductor matrix 234. The electroluminescent photoconductor matrix 234 may, for example, comprise 209 photoconductor switches indicated by numerals PC1 to PC209, a coarse electroluminescent control 236 including l9 electroluminescent capacitor strips C l to C19, extending along the X-axis, a fine electroluminescent control 238 including 10 electroluminescent capacitor strips F1 to F 10, extending along the Y-axis with a symbolic F11 to show the last fine control, and a sectional control 240 which includes l9 sectional photoconductor switches S1 to S19, which are rendered conductive upon illumination of,the associated coarse control electroluminescent capacitor strips C1 to C19.

The electroluminescent photoconductor matrix 234 symbolically shows, in FIG. 2, 209 squares representing the 209 photoconductor switches providing driving or switching means for the 209 electroluminescent display segments 226 a numbered ELI to 51.209. It should be noted that each photoconductor switch PC] to PC209 drives its correspondingly numbered electroluminescent segment, and in this sense are correlated one to the other. It should be also noted that FIG. 2 symbolically shows at 226 an example of 36 activated electroluminescent segments which are driven by 36 photoconductor switches PCI to PC36.

The interconnection of the photoconductor switches 224 with their corresponding electroluminescent display segments 226 is shown in more detail in FIG. 3 wherein the electroluminescent segments 226 are controlled by the photoconductor switches 224 through the fine electroluminescent switching means 238 controlled by the six silicon controlled rectifier switches 461A to 461F of FIG. 6 which control the energization of the IQ electroluminescent strips F1, to F10. In addition, the coarse switching means 236 is controlled by the I0 silicon controlled rectifier switches 761A to 761] of FIG. 7 which control the energization of the 19 electroluminescent strips C1 to C19 of FIG. 8.

Therefore, as shown in FIG. 3, the electroluminescent photoconductor matrix 234 illuminates 209 photoconductor switches PC 1 to PC2119 through the electroluminescent strips F1 to F10 and CI to C19 of FIG. 8, by the silicon controlled rectifier switches 461A to 4611 and 761A to 761.1 which are operatively controlled by the driven network 221 of FIGS. 6 and 7.

It should be noted that FIG. 3 is a fragmentary drawing of the electronic circuitry to show the connection between the silicon controlled rectifier switches energizing the electroluminescent strips and that FIGS. 6 and 7 show in greater detail the silicon controlled rectifier electronic circuitry utilized in the solid-state display circuitry to drive the optoelectric portion of the system. That is, FIGS. 6 and 7 show the electronic circuitry which operates to energize the l9 electroluminescent coarse control strips C1 to C19 extending in the X-axis and the l9 electroluminescent fine control strips F1 to F10 extending in the Y-axis of the electroluminescent photoconductor matrix 234 to provide thereby two orders of control to illuminate the electroluminescent display segments 226. However, as hereinbefore described, and as shown in FIGS. 2 and 3, multisegment switching of the electroluminescent display 226 requires three orders of control. This third order of control is effected by providing photoconductor switches S1 to S19 of the sectional control 240 each of which sectional control switches corresponds to one of the photoconductors such as the last photoconductor in each row PClI, PC22, PC33, and so on up to the last photoconductor PC 198 located on the next to the last row of photoconductors. These photoconductors, PCll, PC22, PC33, and so on to PC198 corresponding to the sectional control switches S1 to S19, respectively, are the last photoconductors on each of the electroluminescent strips extending on the Xaxis from C1 to C18 except for the last electroluminescent strip C19. The last photoconductor PC209 may be utilized as an additional section control switch in the event more than 209 electroluminescent display segments were to be illuminated.

In this system the photoconductors S1 to S18 of the sectional control 240 are used to control the excitation for the next row of photoconductors extending on the X-axis. For example, as shown schematically in FIG. 3, the photoconductor PC11 corresponding to the sectional control switch S1 is used as a standby power switch for the second row of photoconductors, PC12 to PC22.

-More specifically, as shown in FIG. 3, photoconductor PClI corresponding to sectional control switch S1 is connected through line conductors 242 and 250 to one terminal of a suitable source of alternating current 243. The other terminal of the source 243 is connected by a line conductor 2% to a ground 245. The photoconductor PCllllis also connected by a line conductor 246 to electroluminescent segment ELllll and in turn the electroluminescent ELltll is connected to ground 245 by a common line conductor 2 58. in addition, the line conductor 25th connects the row of photoconductors PCll to PClll. When the electroluminescent strip Cl is illuminated, light rays are directed thereby upon the photoconductors PCR to PCllll to reduce their electrical resistance and render them conductive of electrical energy, whereupon voltage from the alternating current source 243 will be applied through photoconductor PClll corresponding to the sectional control switch 511 to the photoconductors PCll2 to W122 through a line conductor 252. Thereafter, should the fine control electroluminescent strips Fl to Fill be illuminated, then the photoconductors PC2111 to PC2ll would be rendered conductive; or, should the coarse control electroluminescent strip C2 be illuminated, then the photoconductors PClil to PC22 would become electrically conductive and current would be directed to the electroluminescent segments lELll2 to H122 for illuminating segments of the electroluminescent display 226. That is,'when the photoconductor Will is switched on to illuminate the eleventh electroluminescent segment Ellll through the line conductor 246, it is also effective as the sectional control switch Sll to connect through the line conductor 252 for standby the next row of X-axis extending photoconductors PCl2 to W22.

Furthermore, the photoeonductor PC22 is connected to the alternating current source 2453 through photoconductor P Cll by the line conductor 252 and should the photoconductor PC22 have been previously rendered conductive by the illumination of the coarse control strip C2, the photoconductor PC22 then serves to efiect the illumination of the electroluminescent segment EL22 through a line conductor 2574. At the same time photoconductor PC22 is also eitective as sectional control switch S2 to connect for standby the next succeeding row of X-axis extending photoconductors PC23 to PC33, as shown by HG. il l. The photoconductor PC3535, upon illumination of the coarse control strip C3, is rendered conductive to illuminate the electroluminescent segment EH53 and is thereupon effective as sectional control switch S3 to connect for standby the next succeeding row of X-airis extending photoconductors PCEMl to P-C l l, and so on until photoconductor PC1128, shown by MG. 2, becomes effective upon illumination of the coarse control strip Cid to connect for standby the last row of X-mis extending photoconductors PCRW to PC2409.

The driven network 22R while utilizing only 16 silicon controlled rectifier switches may be rendered effective to drive .Y-axis extending fine control electroluminescent strips and 19 X-axis extending coarse control electroluminescent strips, for energizing 209 electroluminescent display segments, as hereinafter explained with reference to H08. 6 and 7.

As shown schematically in FlG. It, the electroluminescent display segnents 226 are divided into a column of a number of small segments of a phosphor material. The number needed being determined by the accuracy, resolution, and sensitivity requirements of the display instrument.

DlMll/illlNG CONTROL Referring now to the dimming control 22%, a dimming potentiometer control 255 shown in FlG. d provides for manual control of the brightness of the energized electroluminmcent display segments 226 so that the display may be distinguishable under any condition of ambient illumination.

The dimming circuit 222, shown in FIG. t, comprises a back biasing diode bridge rectifier 256 connected in the common conductor 23!. leading from the display segments 2%, shown in H0. 3, and interposed between the electroluminescent display segments 226 and the conductor 2412 leading to ground M5. A dimming potentiometer control 255 is provided for the area source lamp to balance the display for darkness operation. The brightness of the electroluminescent segments will be adequate for visibility in normal lighting (approximately 50 foot candles). The arrangement is such that the diode bridge rectifier 256 serves to limit the passage of alternating current from the source 243 and through the displaysegments 226 to a voltage greater than a back biasing direct current voltage 257 set by adjustment of the potentiometer 255. In this manner, there is provided a precise control of the electroluminescent display brightness regardless of the number of electroluminescent segments activated.

Referring particularly to the back biasing diode bridge rectifier 256, it will be seen that a first diode 258 comprises an anode 259 connected to a junction 273 and thereby to the ground M5 by conductor 2&8 and a cathode 260 connected to a junction 261i to which leads the conductor 27d from the control potentiometer 255. A second diode 262 comprises an anode 263 connected to a junction 264 to which leads the line conductor 23ll from the electroluminescent display segments 226 and a cathode 265 connected to the junction 261.

in addition, the bridge rectifier 256 comprises a third diode 266 having an anode 267 connected to a junction 268 from which leads the conductor 275 to the control potentiometer 255 and a cathode 269 connected to the junction 264 to which leads the line conductor 23K from the electroluminescent display segments 226. A fourth diode 270 has an anode 27ll connected to the junction 268 and a cathode 272 connected to the junction 273 and thereby through the common line conductor to the ground 245.

ln this manner, the back biasing diode bridge 256 is connected to the ground 245 in series with the electroluminescent display segments 226 by its two junctions 264 and 273. The bridge rectifier 256 is also connected to the back biasing direct current voltage 257 at its 4 junctions 261 and 268 through line conductors 27d and 275, respectively. The line conductor 275 is connected to a negative terminal 276 of a direct current supply voltage 280 and to one terminal 2% of a resistor 2552 at junction 223. The other line conductor 274 is connected through a movable contact arm 284 to the resistor 282 which resistor is connected at an opposite terminal 286 to a positive terminal 2% of the supply voltage 2&0. The lighting intensity may be adjusted, as desired, by suitable adjustment of the dimming potentiometer control 255 to set the back biasing DC voltage so as to limit the effective voltage of the energizing alternating current applied through the bridge rectifier 256 to the electroluminescent display segments 226.

The electroluminescent display segments ELll to H209 are essentially capacitors and if a direct current voltage is applied across an electroluminescent segment no light would be produced. At the same time, if a portion of the alternate current voltage which is applied across the electroluminescent segment is blocked, it will vary its brightness. Therefore, since the electroluminescent segments 226 are in series'with the bridge rectifier 256, an operator may adjust the control potentiometer 255 to vary the back biasing direct current, whereupon the alternating current supplied across the electroluminescent segments 226 will be varied to reduce or increase the brightness of the electroluminescent display lamps.

Control System For Display Segments As herein described with reference to FIG. l, a direct current analog signal voltage effected by the condition sensor 21b is compared in a comparator 2% with afeedbaclr voltage applied through a summation network 222 by the driven network 22R and any difference or error voltage in ted to the electronic drive circuitry 2MB of llG. 5 to control the operation of a driven network 22l shown in M05. 6 and 7, as hereinafter more fully described.

Within the electronic circuitry of FIGS. 5 to 7, the differential error voltage resulting from the comparison of the direct current analog signal voltage and the feedback voltage is used to control the length of the lighted electroluminescent display column 226. That is, a lighted condition is caused to progress along the display column of the electroluminescent network 221 which causes electroluminescent driving capacitor strips F1 to F10 and C1 to C19 to shine upon the photoconductor switches PCl to FC209, as shown by FIG. 11,

to excite, in turn, a predetermined number of the 209 electroluminescent display segments EL1 to EL209 corresponding to an indicated value of the condition sensed by the sensor 210.

Thus, by means of the direct current analog and feedback signals from the electronic circuit, the length of this lighted electroluminescent column of the display segment 226 is continuously compared to the value of the direct current input parameter of the sensor 210. When the lighted column of the display segments 226 has progressed to the predetermined length indicative of the sensed condition, the switching circuit is operated to stop further movement or illumination of the column of the display segment 226.

' As hereinbefore described with reference to FIGS. 2 and 3, the various electroluminescent capacitor control strips F1 to F10 and C1 to C19 of the electroluminescent photoconductor dr ve circuits, internal to the display indicator, are not made in the same geometrical format as the column of the display seg ments 226. The display segments 226 may be made, for example, of 44 electroluminescent display segments to the inch, but the electroluminescent capacitor control strips are provided with a series of 10 parallel spaced electroluminescent fine control strips F1 to F10 extending in a Y-axis direction, and the other with a series of 19 parallel spaced electroluminescent coarse control strips C1 to C19 extending perpendicular thereto in an X-axis direction. The electroluminescent strips are then connected to the electronic control circuitry, partly shown in schematic form in FIGS. 3 and 4, and more fully shown in FIGS. 5, 6, and 7.

The various electroluminescent and photoconductor elements may be arranged on four or more thin cards, as shown in FIGS. 8, 9, and 10. These cards may be stacked and interconnected in the same manner as if they were a single format, as shown in FIG. 11. In addition, in simplifying the production of these electroluminescent photoconductor elements, this method may be used for trouble shooting and thus allow for change of scale factor in the summation of signals from each card. Reliability theory assigns a great importance to the proper assembly of individual electroluminescent and photoconductor cells. The electronic drive circuitry shown in FIG. 5 and driven network 221 and summation network 222 shown in FIGS. 6 and 7 performs the guiding control for the various coarse and fine electroluminescent strips shown in FIG. 8, the photoconductors shown in FIG. 9, and eventually the electroluminescent display segments 226 as best shown in FIGS. 3 and 10.

The optoelectric connection between the electroluminescent strips of FIG. 8 and the photoconductors of FIG. 9 are shown partially in FIG. 10. That is, for an understanding of the interconnection of the electronic system with the electroluminescent photoconductor system, attention is directed to FIG. 10, which shows portions of the electronic circuitry interconnected with portions of the electroluminescent photoconductor system. FIG. 10 shows a portion of FIG. 9 overlayed on a portion of FIG. 8 to produce a more realistic connection between the photoconductor network of FIG. 9 with that of FIG. 8. It should be also noted that the numbering of the electronic elements and the electroluminescent photoconductor elements are designated the same through all of the FIGS, so that one may be able to understand their overall interconnection.

FIG. 11 shows a schematic interconnection of the silicon controlled rectifiers with the electroluminescent photoconductor system.

In the operation of the system shown in FIGS. 1 to 4, assuming that 13 segments of the electroluminescent display segments 226 are to be activated by an input signal, the input signal will drive three silicon controlled rectifier switches; that is, the switch 761A of thecoarse silicon controlledrectifier circuitry 221 of FIG. 7 and the switches 461A and 461B of the fine silicon controlled rectifier circuitry 221 of FIG. 6 to turn on a portion of the electroluminescent matrix 220 of FIG. 8. That is the coarse electroluminescent capacitor strip C1 and the fine electroluminescent capacitor strips F1 and F2 will be turned on by the silicon controlled rectifiers to in turn effect the illumination of the display segments 226 to indicate a measured parameter of 13.

The electroluminescent capacitor strip C1 will then, upon illumination, act to switch on PC 1 through PC11 and to apply voltage to the first ll electroluminescent segments ELI to ELll. Since only one sectional control switch S1 corresponding to standby photoconductor switch PC 11 is activated, only the second row 'of X-axis extending photoconductors PC12 to PC22 will be on standby.

Thereafter, the fine electroluminescent strips F1 and F2 will activate or turn on, by illumination, the switches PC12 and PC13, making a total of 13 switches activated. The other photoconductor switches PC14 to PC22 will have voltage applied to them by photoconductor switch PC11, but since the electroluminescent strips F3 to F10 will not be energized by the silicon controlled rectifiers, they will not be illuminated to switch on the photoconductor switches PC14 to PC22.

Briefly then, the coarse control electroluminescent strip Cl produces a holding operation while the standby power switch PCll corresponding to the sectional control switch S1 permits the fine control electroluminescent strips F1 and F2 to be illuminated to produce the succeeding or vemier operation for illuminating the electroluminescent display segments EL12 and EL13 to present a total of 13 electroluminescent display segments.

The detail circuitry and the mode of operation thereof in effectively controlling the display indicator 226 will be explained hereinafter more fully under the heading Summary of Operation of Solid-StateDisplay System.

Comparator Referring now to the electronic circuitry shown in detail by FIG. 5, it will be seen that the sensor used for the comparator circuitry is a thermocouple 310 connected to a simple single transistor comparator circuit 216.

The single transistor comparator circuit 216 provides for the comparison of signal and feedback inputs before the conversion into an alternating current form. The alternating current phase does not enter into the comparator circuit and, since the current through the single transistor is proportional to the difference of the inputs, the power dissipation of the single transistor is minimized since the signal and feedback inputs of the comparing signals are of the same polarity. Both of the inputs and the outputs can be applied in respect to the same common and no transformer isolation is required.

FIG. 5 of the drawing shows the details of the electronic comparator circuitry 216 which may be a type described and claimed in the aforenoted U.S. Pat. No. 3,363,112 The thermocouple 310 serves herein as a condition sensor which provides the first variable source of potential or direct current voltage in relation to a sensed parameter. The first variable source of potential of the thermocouple 310 is connected in series with a resistor 311, which in turn is connected to a junction 313. At the junction 313, the first potential is compared with a feedback second potential indicated by arrow 227 and applied at a junction point 333 through a conductor 334 leading from the summation network 222 shown schematically in FIG. 1 and in circuit detail in FIGS. 6 and 7. At the junction 313 a line conductor 314 connects the resultant differential or error signal voltage applied at an emitter terminal 315 of a PNP type switching transistor 316 in the comparator 216 to an input preamplifier and phase discriminator 219 of the drive circuitry 218 which may be of the type described and claimed in the aforenoted copending U.S. application Ser. No. 400,534.

In the comparator 216 and connecting a base terminal 313 of the transistor 316 is a limiting resistor 320 and a rectifying diode 322. The limiting resistor 3211 and rectifying diode 322 are interposed between the transistor 316' and an alternating current reference voltage source 324 which may apply to a primary winding 321and thereby to a secondary winding 323 of a coupling transformer 325 an alternating current voltage.

As shown in H6. 5, the diode 322 includes a cathode 326 connected to one terminal of secondary winding 323 of the transformer 325 and an anode 327 connected to the resistor 320. The diode 322 blocks positive voltage pulses from the coupling transformer 325 and permits negative voltage pulses to go through it to impinge on the base lead 313 of the PNP transistor 316. Therefore, the diode 322 is used to block the positive pulses of the reference voltage signal from the base 318 of the transistor 316 while permitting the negative pulses to be applied to the base 318 of the transistor 316 to render the transistor 316 alternately conductive and nonconductive and thus effective as a switching means. in addition, the transistor 316 is provided with a collector terminal 323 which is connected at junction 333 to an opposite terminal of the secondary winding 323 of the coupling transformer 325. A capacitor 331 having one plate connected to junction 333 and an opposite plate connected by a conductor 337 to ground serves to eliminate any noise due to alternating current pickup and bypass the alternating current pickup to ground so that direct current voltage only is effective at junction 333.

The direct current feedback voltage effective at the junction 333 is supplied through the line conductor 334 from the summation network circuitry 222 shown in FIGS. 6 and 7 which provides the second potential. The second feedback potential applied then at the junction 333 is effectively compared with the first analog signal potential applied at junction 313.

Thus, there is provided a comparator 2116 in which the first source of potential of the thermocouple 3111 at the junction 313 is a command signal voltage which is compared with the second source of potential from the summation circuitries of FIGS. 6 and 7 at the junction 333. The second source of potential is a proportional feedback signal voltage directed from summation network 222.

in addition, as shown in FIG. 5, the thermocouple 310, the capacitor 331, and the drive circuit 213 are connected to ground 245 by line conductors 331', 337, and 333, respectively.

in the operation of the comparator 216: shown in MG. 5, the second potential or direct current feedback voltage signal is applied to the collector terminal 323 of the Phil transistor 316 and compared with the first potential or direct current analog voltage signal at the sensor 3111 developed in the circuitry at the emitter terminal 315 of the PNP transistor 316. The transistor 316 senses the difference of these two direct current signals and then converts the difference into a pulsating output signal of one phase upon the first signal dominating and of an opposite phase upon the second signal dominating and of a frequency F corresponding to that of the alternating current reference source 32 1.

it should be noted that if there is no difference between the two direct current sigials, the one from the thermocouple 210 and applied at junction 313 and the other from the summation network 222 of FIGS. 65 and '1" and applied at junction 333, there will be no output, and the comparator are will be in an effective null condition. At this point, the reference altemating current voltage source at 32 will continue to apply, through the diode 322. negative pulses to the base 313 of the transistor 316 for effectively rendering the PNPtype transistor more conductive and then upon the negative pulse pausing less conductive in the manner of a switch closing and then opening its contacts, but it will produce no effective output at the conductor 31d.

- This switching action of the transistor 316, however, upon the positive direct current voltage applied by the condition sensor or thermocouple 210 at the junction 313 being increased at the junction 313 in relation to the positive direct current feedback voltage applied at the junction 333 by the summation network 222, is thereupon effective to cause a pulsating direct current signal voltage to be applied at the output conductor 314 having a negative going phase in timed relation with the negative pulse applied to the base 313 of the PNP- type transistor316 rendering the same more conductive and a positive going phase upon the cessation of the negative pulse applied to the base 318, rendering the transistor less conductive.

Thus upon an increase in the temperature condition sensed by the thermocouple 310 effecting an increase in the positive direct current voltage applied at the junction 313, there will be effected at the output conductor 314 a pulsating direct current signal in phase with the reference voltage from the source Conversely, upon a decrease in the temperature condition sensed by the thermocouple 210 effecting a decrease in the positive direct current voltage applied at the junction 313 in relation to the positive direct current feedback voltage applied at the junction 333 by the summation network 222, there will be effected at the output conductor 314 a pulsating direct current signal opposite in phase to the reference voltage from the source 32 1.

The pulsating direct current signal derived from the comparator 216, and indicated by arrow 215 and of the one phase or the other, is directed through the line conductor 313 into the preamplifier and phase discriminator 219 at the input to the drive circuitry 218. The signal is then directed to the drive circuitry portion of FIG. 5, as hereinafter described, through output line conductors 339 and 340.

Preamplifier And Phase Discriminator The preamplifier and phase discriminator 219, as described in the U.S. Pat. No. 3,333,114, includes an NPN-type transistor 01 having a base 13 connected to the output conductor 314 from the signal source or comparator 216 through a coupling capacitor C1, while an emitter 15 of the transistor 01 is connected through a conductor 16, a resistor R1, and a conductor 333 to the ground 245 and thereby to the opposite output conductor 336 from the comparator 216.

The emitter 15 of the transistor O1 is further connected to a capacitor junction 17 through a resistor R2, while the collector 13 is connected to the capacitor junction 17 through a resistor R3 and to a positive terminal of a direct current supply source 12 through conductors 3441 and 379 and a resistor R4. The negative terminal of the direct current supply source 12 is connected to ground through a conductor 11). in addition, the emitter 15 and collector 18 are connected by conductors 339 and 34111, respectively, to a reference alternating current voltage supply network 1F having a frequency f and including the source of alternating current 324.

The conductors 339 and 340 are coupled through DC blocking capacitors 345 and 347 and respective conductors 333 and 349 to gating terminals 342 and 346 of silicon controlled rectifiers 3M and 348, effectively connected to the reference network supplied by the source of alternating current 324. It should be noted that the line conductor 343 is con nected to the ground 245 through a resistor 350 leading to a grounded conductor 341, while the line conductor 349 is connected to the ground 2415 through a resistor 3741 leading to the grounded conductor 341.

Drive Circuitry The reference voltage network F includesa rectifying diode 355, silicon controlled rectifiers Wand 3413, and the AC reference voltage source 3241 providing an alternating current having a frequency of f applied through a coupling transformer 332, conductor 363 to the rectifying diode 355. This alternating current is then transferred by the rectifier 355 to positive pulses of the frequency f which are in turn applied through the conductor 35 1 and conductor 363 to the anodes 352 and 3% of the silicon controlled rectifiers 3441 and 3433.

The silicon controlled rectifier 348 is connected by its gating terminal 346 to'the signal circuit E, by the line conductor 349 through the coupling capacitor 347 and conductor 340 to the collector terminal 18 of the NPN-type transistor Q1. In addition, the silicon controlled rectifier 348 is connected by its gating terminal 346 to the ground 245 through the resistor 374 and conductor 341. The silicon controlled rectifier 344 is connected by its gating terminal 342 to the signal circuit E, by the line conductor 343, through the coupling capacitor 345 and conductor 339 to the emitter terminal of the NPN-type transistor Q1. In addition, the gating terminal 342 of the silicon controlled rectifier 344 is connected to the ground 245 through resistor 350 and the conductor 341.

As shown, the silicon controlled rectifiers 344 and 348 are also connected by their cathodes 356 and 370, to the ground 245, through resistors 358 and 372, respectively, and the grounded conductor 341. The anodes 352 and 366 of the silicon controlled rectifiers 344 and 348 are connected to the cathode 367 of the rectifying diode 355 for receiving the positive voltage from the AC reference voltage source 324 through its anode 369. The silicon controlled rectifiers 344 and 348 are arranged to fire selectively depending on the signal received through the phase discriminator 219 from the signal source or comparator 216, which in turn, depends on the relation of the phase of the pulsating DC signal supplied from the comparator 216 to the phase of the pulsating DC reference voltage applied through the rectifier 355 by the source 324; that is, if the phase of the pulsating DC signal from the source or comparator 216 is such as to apply at the output line 340 of the phase discriminator 219 a signal voltage in phase with the reference voltage applied through the rectifier 355 from the source 324, silicon controlled rectifier 348 will fire to produce a positive pulse across resistor 372; and conversely, if the phase of the pulsating DC signal from the source or comparator 216 is such as to apply at the opposite output line 339 of the discriminator 219 a signal voltage in phase with the reference voltage applied through the rectifier 355 from the comparator 216, silicon controlled rectifier 344 will fire to produce a positive pulse across resistor 358. The positive pulses applied through the controlled rectifier 344 will be directed through the alternating current switching network G, while the positive pulses applied through rectifier 348 will be directed through the clearing circuitry H to the driven network 221 of FIGS. 1, 6, and 7, as herein more fully described.

in the operation of the comparator 216, it will be seen that the pulsating DC signal applied through the output conductor 314 to the input of the preamplifier and phase discriminator 219 may reverse in phase dependent upon the comparative condition of the DC signal voltage applied at the point 313 by the condition sensor 210 and the feedback voltage applied at the point 333 through the conductor 334 from summation network 222 of FIGS. 1, 6, and 7.

Thus, for an increasing measured quantity sensed by the condition sensor 210 causing an increase in the DC signal and applied at the point 313 relative to the feedback voltage applied at the point 333, there will be applied through the conductor 314 a pulsating DC voltage in phase with that of the reference voltage applied by the source 324 through the coupling transformer 325 and diode 322 to the base 318 of the transistor 316. However, upon a decrease in the DC signal voltage applied at the point 313 relative to the feedback voltage applied at the point 333, the phase of the DC signal voltage applied through the conductor 314 would be of a phase opposite to that of the reference voltage applied from the source 324.

Thus, the phase of the DC pulsating input voltage applied to the preamplifier and phase discriminator 219 will be in phase with the reference voltage supplied by the source 324 upon the measured quantity sensed by the condition responsive sensor 210 increasing with respect to the followup voltage while upon a decrease in such measured quantity the pulsating DC input signal supplied to the preamplifier and phase discriminator 219 will be opposite in phase to that of the reference voltage from the source 324.

In the drive circuitry 218, the resistors R1 and 380 are so chosen that signals of substantially equal amplitude and of opposite phase appear at points 19 and 21 in the discriminator circuit 219. The signal at point 19 is opposite in phase to that of the pulsating DC input signal from the comparator 216 and the signal at point 21 is in phase with the pulsating DC input signal applied from the comparator 216 through the input conductor 314. The signal at point 19 is applied to the gating terminal 346 of a silicon control rectifier 348 and the signal at point 21 is applied to the gating terminal 342 of the silicon controlled rectifier 344. Either the silicon control rectifier 348 or the silicon controlled rectifier 344 fires, depending upon the phase of the input signal from the source or comparator 216. The silicon controlled rectifier 348 fires when the reference and the voltage at point 19 are in phase to provide a potential across the transistor 372. On the other hand the silicon controlled rectifier 344 fires when the reference voltage and the signal at point 21 are in phase to provide a potential across resistor 358.

It will be seen then that the silicon controlled rectifier 344 fires upon an increase in the quantity measured by the sensor 210 while the silicon controlled rectifier 348 fires upon a decrease in the quantity measured by the condition sensor 210. The silicon controlled rectifier 344 upon firing, con trolling the alternating current switching circuit G while the silicon controlled rectifier 348 upon firing controlling the clearing circuit H.

The alternating current switching circuit G includes an alternating current switching voltage source 223 of conventional type operatively connected through the diode 355 to the alternating current reference voltage source 324 and effective to provide at output conductors 402 and 403 alternate positive DC pulses of a frequency of F/2 or half the frequency of the voltage source 324 to alternately open and close a pair of switching transistors 400 and 401 which may be of the NPN-type 1 This alternate switching of the transistors 400 and 401 will permit driving pulses received from the reference voltage network F to appear upon the selective firing of the silicon controlled rectifier 344 at either output line conduit A or output line conduit B depending on whether transistor 400 or transistor 401 is closed at that instant and of course upon the selective firing of the silicon controlled rectifier 344 in response to an increasing sensed quantity signal applied through the output conductor 339 of the phase discriminator 219.

These driving pulses supplied through the conduits A and B are utilized to drive the driven circuit 221 of FIGS. 6 and 7 in response to said sensed increasing quantity to in turn effect at the electroluminescent display segments 226 an indication of the increased sensed condition, as hereinafter explained.

In this connection, it may be noted that the cathode 356 of the silicon controlled rectifier 344, besides being connected to the ground 245 through the resistor 358, is connected through a conductor 409 to a collector terminal 410 of the switching transistor 400 and to a collector terminal 412 of the switching transistor 401. These connections are provided for the transmission of the pulses received from the silicon controlled rectifier 344, through the switching transistors 400 and 401 to the output line conductors A and B, respectively.

The switching transistor 400 is shown with its base terminal 414 connected to the pulsating positive direct current voltage applied through conductor 402 from the source 223 at the frequency f/2 and the switching transistor 401 is shown with its base 415 connected to the alternate pulsating positive direct current voltage applied through conductor 403 from the source 223 at the frequency f/2. Further, the line conductor A is connected to an emitter terminal 416 of the transistor 400 and the line conductor B is connected to an emitter terminal 417 of the transistor 401.

In addition, as illustrated in FIG. 5, the cathode 370 of the silicon controlled rectifier 348, besides being connected to the ground 245 through the resistor 372, is connected to a clearing circuitry H by a line conductor 420.

The clearingcircuitry l-I comprises an NPN-type transistor 422 having its base 434 connected to the line 420 through a resistor 432 and an NFN type transistor 424 having a base 434) effectively connected to line 420 by a delayed circuitry made up of a resistor 42s and a capacitor 428. The transistors 422. and 424 are connected to control a pair of clearing line conductors C and D, respectively. The line conductor C is connected to clear one circuit, such as, the fine circuit shown in FIG. 6, while the line conductor D is connected for a delayed clearing of the coarse circuit shown in FIG. 7.

More specifically, pulses received from the silicon controlled rectifier 348 are directed through the resistor 426 to a base terminal 434) of the transistor 424 and to a plate of the capacitor 428 having an opposite plate connected to the grounded conductor 341. Further, the pulses directed through the silicon controlled rectifier 348 are directed through the resistor 432 to the base terminal 434 of the transistor 422. Con nected to collector terminals 436 and 437 of the transistors 422 and 424, respectively, are the line conductors C and D for clearing the fine and coarse circuits of the summation circuitry shown in FIGS. 6 and 7.

- Depending on the extent of the signal in a decreasing measured quantity sense received from the comparator 2T6, the summation circuitry shown in FIGS. 6 and '7 will be cleared by the selective directing of current through emitter terminals 43% and 439 of transistors 422 and 424, respectively. Since the emitter terminals 438 and 43% are connected to ground 245 by line conductor 3411, the current will be dissipated through said ground 245 when the transistors are closed as hereinafter more fully described.

Operation 0f Switching Network Assumingthat the thermocouple 311%, as hereinbefore mentioned, senses a rising temperature, then the driving pulses applied through the controlled rectifier 344 will appear either on line conductor A or the line conductor Bfdepending whether transistor 44M) or 44911 is closed at that instant. If a train of pulses appears on the line conductors A and B, it will be directed such that the even pulses will be fed into line conductor A and the odd pulses will be fed to line conductor B or conversely, depending on the phase relationship of the pulses and the half frequency operating transistor switches 4M and 4411. This alternating output to line conductors A and B can then be used to drive the integrator circuit or driven network 221 shown in FIGS. 6 and '7.

This operation will continue as long as the driving signals are alternately directed through either line conductors A or B, in response to a pulsating direct current voltage at the output line 324 from comparator 216 of a phase indicative of an increasing temperature condition sensed by the thermocouple Zlli) rendering the controlled rectifier M4 effective. In the event the sensed signal begins to decrease in relation to the feedback voltage at junction 333, then phase of the pulsating direct current'voltage at the output line 314 will be of an opposite phase, whereupon the controlled rectifier would no longer be effective while the controlled rectifier 34% would be brought into operation by the opposite phase of the signal to generate a positive pulse across the resistor 372 and thus turn on current to the clearing transistors 422 and 424.

' The current will continue pulsating into the transistors 422 and 424 even though a single pulse may clear the fine circuit of the driven network 221 shown in FIG. 6 through the line conductors C, passing current through the transistor 422 and to the ground 245 from the fine circuit. It should be noted that a continuous pulsation of the current through the delayed circuitry made up of resistor 426 and capacitor 424 will build up a charge applied to the capacitor 428 and thereby on the base 430 of the transistor 424 to effectively close the transistor 424 and permit the clearing of the coarse circuitry of the driven circuit shown in FIG. 7. The coarse circuitry will be cleared through the line conductor D passing current through the closed transistor 424 and to the ground 245 from the coarse circuit of the driven network 221 shown in FIG. 7.

its

possible to use a sensor such as the thermocouple 310 to sense a measured quantity and to alternately drive and sequentially increase the electroluminescent display segments 226 shown in FIGS. 1 to 4, depending upon the closing and opening of the pair of switching transistors 4M) and 401. The alternate output derived will then be used to drive the step integrators shown in FIGS. 6 and 7 to energize the display segrnents226.

If the output phase of the comparator 216 is reversed, as upon a decrease in the condition sensed by the thermocouple 3110, another pulse will be produced to clear the step integrator circuitry of FIG 6. The electroluminescent segments 226 will be deenergized through the clearing circuitry or through the transistors 422 for clearing the display segments 226 in small or fine steps or completely clearing the display segments 22s by the coarse clearing circuit through transistor 424. That is, by turning on the clearing transistors 422 and 424, the fine and coarse circuits of the step integrator of FIGS. 6 and 7 may be cleared. The instantaneous and delayed clearing features described herein can thus be used when a portion of the circuit is to be cleared and then another portion is to be cleared at a predetermined time thereafter.

FINE DRIVEN NETWORK Referring now particularly to FIG. 6, there is shown a fine memory section FM and a fine summation section F3. The fine memory section FM is connected to the electronic drive circuitry 218 just described in FIG. 5 by the input line conductors A and B and the clearing line conductors C and D. As mentioned, the line conductors A and B alternately receive a train of drive pulses from the drive circuitry G of FIG. 5 and the line conductors C and D receive clearing pulses from the clearing circuitry H of FIG. 5, depending upon whether the condition measured by the sensor 210 be increasing or decreasing and the resultant phase relationship of the signal pulses directed through the output conductor 314 to the drive circuitry 22% by the comparator circuit 216.

The phase relationship of the pulses as described depends upon whether a measured parameter, sensed by the thermocouple 310, is increasing or decreasing. If the measured parameter is increasing, the line conductors A and B will receive driving pulses, and if the measured parameter is decreasing, the line conductors C and D will receive clearing pulses.

The line conductors A and B from the electronic drive circuitry 21s of FIG. 5 receive the alternating drive pulses for turning on a plurality of silicon controlled r'ectifiers 4611A to 46llF in thedriven network 221i of FIG. 6. The silicon controlled rectifiers 4611A to 461F in the driven network 221 will stay on, due to their inherent latching effect, even after the drive pulses have disappeared. This switching action will continue to build up voltages received from the input signal of the electronic drive circuitry 218 of FIG. 5 within the fine summation section FS of FIG. 6. These input signal pulses will sequentially turn off a plurality of transistors 451A to 451IF in the summation section FS .that will divert a supply of direct current into a summing resistor 902, shown in FIG. 7, so as to effect a voltage drop across the summing resistor 902 as a direct current step output for counting the drive pulses received by the system. This step output voltage drop across summing -resistor 902 is in turn applied through conductor 334 leading from the tenninal Mil of the resistor 902 as a positive going direct current feedback voltage to the junction 333 in i the comparator 216 of FIG. 5 to be compared therein with the positive going direct current signal voltage applied at junction the circuit within the silicon controlled rectifiers until a pulse is applied to the clearinglines C and D.

I trolled rectifier 4618. These silicon-controlled rectifiers 461D Therefore, as illustrated in FIGS. 6, the invention provides a V fine electronic step integrator having a fine summation section FS and a fine memory section FM. In addition, there is indicated a plurality of circuits having substantially the same number and type of electronic components, and which corresponding components of each circuit have been indicated by like numerals to which there have been applied the suffix A to F to distinguish between the respective components of the first, second, and up to the sixth circuits. It should be noted that only the main components are numbered but each component, having more than one element, may be designated in the same numerical manner but having a different lettered suffix.

The fine summation section P8 of FIG. 6 generally comprises six transistors of an NPN-type such as transistors 451A to 45lF and their corresponding silicon controlled rectifiers 461A to 46IF in the fine driven network 221 connected to the ground 245 by a line conductor G.

In detail the silicon controlled rectifier 461A is connected by its cathode temtinal 464A to a blocking resistor A and therethrough to the ground line conductor G. The controlled rectifier 461A also has a gate terminal 478A connected by a bleeding resistor 468A to the grounded conductor G in parallel to the blocking resistor 466A.

The gate terminal 478A of the controlled rectifier 46 IA is further connected through a diode 474A and a line conductor 474M to the input line conductor A. Thus, the input line conductor A is connected by the line conductor 470A to an anode 472A of the diode 474A having a cathode 476A connected to the gate terminal 478A of the first silicon controlled rectifier 461A. In addition, there is connected to the gate terminal 478A a line conductor 480A leading to an anode 482A of a diode A having a cathode 486A connected by a line conductor A to the clearing line conductor C.

It should be noted that the diode 474A is operably connected between the input line conductor A and the gate terminal 878A of the silicon controlled rectifier 461A so that it can direct positive going input driving pulses from the drive circuitry of FIG. through the line conductor A to said gate terminal 478A. In addition, the diode A is connected to the clearing line conductor C so as to permit negative going clearing pulses to be applied to the gate terminal 478A from the clearing line conductor C to turn off the controlled rectifier 461A upon a clearing signal being applied at the drive circuitry of FIG. 5 rendering the transistor 422 conductive so that negative going clearing pulses may be applied through said line conductor C and the transistor 422 from the grounded connection 245.

In the second detailed circuitry of silicon controlled rectifier 4618, the input line' conductor B is connected by line conductor $703 to an anode 4728 of a diode 474B having a cathode 4768 connected to a gate terminal 478B of the second silicon controlled rectifier 4618. The diode 4748 is operable in the same manner as the diode 474A to direct positive going input drive pulses from the line conductor B to the gate terminal 4783 of the silicon controlled rectifier 4613.

A line conductor 4808 leads from the gate terminal 4788 of the silicon controlled rectifier 4613 to an anode 4828 of a diode B having a cathode B connected by a line conductor to the clearing line conductor C. The operation of this part of the circuit is the same as for the circuit used for the silicon controlled rectifier 461A to clear the silicon controlled rectifier 46KB.

The silicon controlled rectifiers 461C and 461E are provided with the same electrical circuitry as the silicon controlled rectifier 461IA. Each of these silicon controlled rectifiers 461C and 461E have gating terminals connected to the line conductors A and C as shown in FIG. 6 in the same manner as silicon controlled rectifier 461A.

Also, the silicon controlled rectifiers 461D and 461F are provided with the same electrical circuitry as the silicon conand 461F have gating terminals connected to line conductors B and C as shown in FIG. 6 in the same manner as silicon controlled rectifier 461B.

It should be noted, therefore, that the circuitry for each silicon controlled rectifier is substantially the same. In this manner, all of the silicon controlled rectifiers may be either alternately driven by positive-going input drive pulses received through line conductors A and B, or cleared by negative-going clearing pulses received from line conductor C.

In addition to the silicon controlled rectifier circuitries herein described, there is provided in the memory section FM an additional transistor 490 of an NPN type having a base terminal 492 connected through a'resistor 494 by a line conductor 496 to a junction 563. The junction 463 is interposed between an anode 560E of a Zener diode 588E and the anode 568E of the diode 5665 having a cathode 564E connected through resistor 466F to the ground line conductor G. In addition, the transistor 490 has an emitter terminal 498 connected to the ground line conductor G and a collector terminal 500 connected at a junction 501 to cathodes 502,.and 504 of diodes 506 and 508 respectively. An anode 510 of the diode 506 is connected to the line conductor A, and an anode 512 of the diode 508 is connected to the line conductor B.

Furthermore, as shown in the fine memory section FM, of FIG. 6, there is interposed in the line conductor A, between an anode 472E of the diode 474E and the anode 510 of the diode 506 a line resistor 514 and interposed in the line conductor B between an anode 472F of the diode 474F and the anode 512 of the diode 508 a line resistor 516.

In addition as outlined before, the silicon controlled rectifiers 461A to 461F are interconnected with their corresponding electroluminescent photoconductor matrix shown in FIGS. 8 to 11 by six line conductors 521A to 521F leading to electroluminescent photoconductor matrix F1 to F6, respectively, and four line conductors 522A to 522D leading to electroluminescent photoconductor matrix F7 to F10, respectively. Each of these I0 line conductors 521A to 52IF and 522A to 522D are connected to the respective 10 fine electroluminescent capacitor strips F1 to F10 as shown in FIG. 8 or as shown in FIG. 11, and as hereinafter more fully described. That is, line conductor 521A is connected to one plate of the fine electroluminescent capacitor strip F 1, shown in FIG. 8, while line conductor 522A is connected to one plate of the fine electroluminescent capacitor strip F7, shown in FIG. 8. In this way, the fine memory section FM of FIG. 6 is provided with the line conductors 521A to 521F'and the line conductors 522A to 522D for connection to corresponding plates of the fine electroluminescent capacitor strips F1 to F6 and F7 to F10 shown in FIG. 8.

Connected to the line conductors 521A and 522A at junction 524A is an anode 525A of the silicon controlled rectifier 461A. In addition, a cathode 526A of a diode 528A is connected to the anode 525A of the silicon controlled rectifier 461A at the junction 524A. Further, an anode 530A of the diode 528A is connected at junction 532 to a cathode 534A of a diode 536A. The anode 530A and the cathode 534A are further connected at a junction 533A to an anode 538A of a diode 540A. The diode 540A has a cathode 537A which is connected to a line conductor 542 leading to an alternating current source 544 directing current through a transformer 546 as hereinafter more fully described.

An anode 548A of the diode 536A is connected through a resistor 550A and a line conductor 554 to a positive terminal of a suitable direct current source 552 having a negative terminal connected to ground 245. The anode 548A of the diode 536A is also connected to a cathode 556A of a Zener diode 558A.

A cathode 4648 of the silicon controlled rectifier46lB of the second circuit is connected to a cathode 564A of a diode 566A which has an anode 568A also connected to an anode 560A of the Zener diode 558A at a junction 562A. At the junction 562A, the anode 560A of the Zener diode 558A and 

1. A control network comprising a plurality of control devices sequentially operated by electrical signal pulses of one sense for effecting control functions, means responsive to an initial sequential operation of a last of said control devices for effecting an electrical pulse of another sense to terminate the operation of other of said control devices, circuit holding means rendered effective by the initial operation of the last of said control devices for maintaining the control functions effected by the other of said control devices, the other of the control devices being thereupon conditioned for sequential reoperation by the signals of said one sense to effect additional control functions.
 2. The combination defined by claim 1 in which the means responsive to an initial sequential operation of the last of said control devices includes a current control means and a capacitor means, the current control means being responsive to the initial sequential operation of the last of said control devices for causing the capacitor means to effect the electrical pulse of said other sense to terminate the operation of the other of said control devices.
 3. The combination defined by claim 1 including a capacitor-resistance time delay means rendered effective by the initial sequential operation of the last of said control devices to prevent the electrical pulse of said other sense from terminating the operation of the last of said control devices.
 4. The combination defined by claim 1 in which the means responsive to an initial sequential operation of the last of said control devices includes a current control means and a capacitor means, the current control means being responsive to the initial sequential operation of the last of said control devices for causing the capacitor means to effect the electrical pulse of said other sense to terminate the operation of the other of said control devices, and a capacitor-resistance time delay means rendered effective by the initial sequential operation of the last of said control devices to prevent the electrical pulse of said other sense from terminating the operation of the last of said control devices.
 5. The combination defined by claim 1 including switching means conditioned by initial operation of the first of said control devices to prevent the electrical pulse of said other sense from terminating the operation of the last of said control devices.
 6. The combination defined by claim 1 in which the means responsive to an initial sequential operation of the last of said control devices includes a current control means and a capacitor means, the current control means being responsive to the initial sequential operation of the last of said control devices for causing the capacitor means to effect the electrical pulse of said other sense to terminate the operation of the other of said control devices, and a switching means conditioned by initial operation of the first of said control devices to prevent the electrical pulse of said other sense from terminating the operation of the last of said control devices.
 7. The control network defined by claim 1 including a second plurality of control devices, switching means effective upon completion of the sequential reoperation of the other of the control devices of the first mentioned control devices for rendering the second plurality of control devices effective for operation, the second plurality of control devices being thereupon sequentially operable by electrical signal pulses of said one sense for effecting other control functions, third means responsive to an initial sequential operation of a last of said second control devices for effecting an electrical pulse of said other sense to terminate the operation of other of said second control devices, fourth means rendered effective by the initial operation of the last of said second control devices for continuing the other control functions effected by the other of said second control devices, the other of the second control devices being thereupon conditioned for sequential reoperation by the electrical pulses of said one sense to effect further additional control functions.
 8. The combination defined by claim 7 in which the means responsive to an initial sequential operation of the last of said first mentioned control devices includes a Zener diode and a capacitor means, the Zener diode being responsive to the initial sequential operation of the last of said control devices for causing the capacitor means to effect an electrical pulse of said other sense to terminate the operation of the other of said first control devices, and the third means includes another Zener diode and another capacitor means, the other Zener diode being responsive to the inItial sequential operation of the last of said second control devices for causing the other capacitor means to effect an electrical pulse of said other sense to terminate the operation of the other of said second control devices.
 9. The combination defined by claim 7 in which the means responsive to an initial sequential operation of the last of said first mentioned control devices includes a Zener diode and a capacitor means, the Zener diode being responsive to the initial sequential operation of the last of said control devices for causing the capacitor means to effect an electrical pulse of said other sense to terminate the operation of the other of said first control devices, and the third means includes another Zener diode and another capacitor means, the other Zener diode being responsive to the initial sequential operation of the last of said second control devices for causing the other capacitor means to effect an electrical pulse of said other sense to terminate the operation of the other of said second control devices, a capacitor-resistance time delay means rendered effective by the initial sequential operation of the last of said first control devices to prevent the first mentioned electrical pulse of said other sense from terminating the operation of the last of said first control devices, and a switching means conditioned by initial operation of the first of said second control devices to prevent the electrical pulse of said other sense effected by said third means from terminating the operation of the last of said second control devices.
 10. The combination defined by claim 7 in which the switching means includes means first conditioned by operation of the last of said first control devices and subsequentially rendered effective by sequential reoperation of the penultimate of the plurality of first control devices for rendering the second plurality of control devices effective for operation.
 11. The combination defined by claim 7 in which the switching means includes means first conditioned by operation of the last of said first control devices and subsequently rendered effective by sequential reoperation of the penultimate of the plurality of first control devices for rendering the second plurality of control devices effective for operation; the means responsive to an initial sequential operation of the last of said first mentioned control devices includes a Zener diode and a capacitor means, the Zener diode being responsive to the initial sequential operation of the last of said control devices for causing the capacitor means to effect an electrical pulse of said other sense to terminate the operation of the other of said first control devices, and the third means includes another Zener diode and another capacitor means, the other Zener diode being responsive to the initial sequential operation of the last of said second control devices for causing the other capacitor means to effect an electrical pulse of said other sense to terminate the operation of the other of said second control devices; a capacitor-resistance time delay means rendered effective by the initial sequential operation of the last of said first control devices to prevent the first mentioned electrical pulse of said other sense from terminating the operation of the last of said first control devices, and a switching means conditioned by initial operation of the first of said second control devices to prevent the electrical pulse of said other sense effected by said third means from terminating the operation of the last of said second control devices.
 12. The combination defined by claim 7 including means responsive to electrical signal pulses of another sense to selectively terminate the operation of the first and second mentioned plurality of control devices.
 13. The combination defined by claim 7 including means responsive to electrical signal pulses of another sense to selectively terminate the operation of the first and second mentioned plurality of contRol devices, clearing means to apply the electrical signal pulses of said other sense to said means to selectively terminate the operation of said first and second mentioned plurality of control devices, said clearing means including time delay means to apply the signal pulses of said other sense to said second plurality of control devices so as to terminate the operation of said second plurality of control devices after the operation of the first mentioned plurality of control devices has been terminated by the signal pulses of said other sense.
 14. The combination defined by claim 7 including means for receiving and integrating control signals from the first and second plurality of control devices, a fine summation network and a coarse summation network, the fine summation network being operatively controlled by the first plurality of control devices, the coarse summation network being operatively controlled by the second plurality of control devices, and means operatively connecting the fine and coarse summation networks so as to effect a feedback signal for operating the control network.
 15. The combination defined by claim 7 including means for receiving and integrating control signals from said first and second plurality of control devices, a fine summation network and a coarse summation network, the fine summation network including means operated by the first plurality of control devices for effecting a feedback signal for operating the control network, and the coarse summation network including means operated by the second plurality of control devices for effecting the feedback signal for operating the control network.
 16. The combination defined by claim 7 including means responsive to a second sequential operation of the penultimate of said first control devices for rendering the second plurality of control devices effective for sequential operation by the signals of said one sense.
 17. The combination defined by claim 7 including means for receiving and integrating control signals from said first and second plurality of control devices, a fine summation network and a coarse summation network, the fine summation network including means operated by the first plurality of control devices for effecting a feedback signal for operating the control network, and the coarse summation network including means operated by the second plurality of control devices for effecting the feedback signal for operating the control network; and means responsive to a second sequential operation of the penultimate of said first control devices for rendering the second plurality of control devices effective for sequential operation by the signals of said one sense.
 18. The combination defined by claim 17 including means responsive to the signals of said other sense to selectively terminate the operation of the first and second plurality of control devices.
 19. In a control network of a type including a plurality of control rectifiers sequentially operated by electrical signal pulses of one sense for effecting control functions and responsive to electrical pulses of another sense to terminate the operation thereof; the improvement comprising a current control means and a capacitor controlled thereby, the current control means and the capacitor being operatively connected in the control network of the control rectifiers, the current control means being responsive to operation of the last of the sequentially operated control rectifiers for causing the capacitor to effect an electrical pulse of said other sense to terminate the operation of other of said sequentially operated control rectifiers.
 20. The improvement defined by claim 19 including a capacitor-resistance time delay means rendered effective by the initial sequential operation of the last of said control rectifiers to prevent the electrical pulse of said other sense from terminating the last of said control rectifiers.
 21. The improvement defined by claim 19 including switching means conditioned by initial Operation of the first of said control rectifiers to prevent the electrical pulse of said other sense from terminating the operation of the last of said control rectifiers.
 22. The improvement defined by claim 19 in which the current control means includes a Zener diode having a threshold potential below which it is nonconductive and above which it is conductive, the Zener diode being operatively connected in the control network of the control rectifiers and to the capacitor, the Zener diode being rendered nonconductive in response to operation of the last of the sequentially operated control rectifiers for causing the capacitor to effect the electrical pulse of said other sense to terminate the operation of other of said sequentially operated control rectifiers.
 23. A control network comprising a first plurality of control devices sequentially operated by electrical signal pulses of one sense for effecting control functions, a second plurality of control devices, and switching means effective upon completion of a sequential operation of the first control devices for rendering the second plurality of control devices effective for sequential operation by electrical signal pulses of said one sense for effecting other control functions.
 24. The combination defined by claim 23 including means to apply electrical signal pulses of another sense to terminate operation of said first and second plurality of control devices, time delay means to apply the electrical signal pulses of said other sense to said second plurality of control devices so as to terminate the operation of said second plurality of control devices after the operation of the first plurality of control devices has been terminated by the signal pulses of said other sense.
 25. The combination defined by claim 23 including means for receiving and integrating control signals from the first and second plurality of control devices, a fine summation network and a coarse summation network, the fine summation network being operatively controlled by the first plurality of control devices, the coarse summation network being operatively controlled by the second plurality of control devices, and means operatively connecting the fine and coarse summation networks so as to effect a feedback signal for operating the control network.
 26. The combination defined by claim 23 including means to apply electrical signal pulses of another sense to terminate operation of said first and second plurality of control devices, time delay means to apply the electrical signal pulses of said other sense to said second plurality of control devices so as to terminate the operation of said second plurality of control devices after the operation of the first plurality of control devices has been terminated by the signal pulses of said other sense; means for receiving and integrating control signals from the first and second plurality of control devices, a fine summation network and a coarse summation network, the fine summation network being operatively controlled by the first plurality of control devices, the coarse summation network being operatively controlled by the second plurality of control devices, and means operatively connecting the fine and coarse summation networks so as to effect a feedback signal for operating the control network.
 27. A control network comprising a first plurality of control devices sequentially operated by electrical signal pulses of one sense for effecting control functions, a second plurality of control devices, switching means to render the second plurality of control devices inoperative by said electrical signal pulses of said one sense, and control means operatively connected to said switching means and responsive to the operation of said first plurality of control devices by said electrical signal pulses to cause said switching means to render the second plurality of control devices effective for sequential operation by electrical signal pulses of said one sense for effecting other controL functions.
 28. The combination defined by claim 27 in which said control means includes first means responsive to an initial sequence of operation of said first plurality of control devices by said electrical signal pulses to condition said switching means to subsequently render the second plurality of control devices effective for a sequential operation, and second means responsive to a succeeding sequence of operation of said first plurality of control devices by said electrical signal pulses of said one sense to thereupon render the second plurality of control devices effective for sequential operation by electrical signal pulses of said one sense for effecting other control functions.
 29. The combination defined by claim 27 in which said control means includes first means responsive to an initial sequence of operation of said first plurality of control devices by said electrical signal pulses to condition said switching means to subsequently render the second plurality of control devices effective for a sequential operation, said first means including means responsive to operation of the last of said plurality of control devices in said initial sequence of operation to apply an electrical clearing pulse of another sense to other of said plurality of first control devices to terminate operation thereof, and second means responsive to a succeeding sequence of operation of the other of said first plurality of control devices by said electrical signal pulses of said one sense to thereupon render the second plurality of control devices effective for sequential operation by electrical signal pulses of said one sense for effecting other control functions.
 30. The combination defined by claim 29 including other means responsive to the operation of the last of said second plurality of control devices in said sequence of operation thereof to apply an electrical clearing pulse of another sense to other of said second plurality of control devices to terminate operation thereof preparatory to a succeeding sequence of operation of said other second control devices by said electrical pulses of said one sense.
 31. The combination defined by claim 30 including other switch means conditioned by initial operation of the first of said second plurality of control devices to prevent the electrical pulse of said other sense from terminating the operation of the last of said second plurality of control devices. 